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Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems. Determines architecture and logic design, design verification through software developed for component and system simulation, and builds physical implementations through development of multidimensional designs involving the layout of complex integrated circuits.
Job Responsibility:
Provide technical expertise and lead project teams of Electronic and VLSI engineers
Review and evaluate designs for compliance with VLSI technology guidelines
Provide VLSI-specific expertise to cross-organization projects
Provide leadership to project teams of VLSI engineers
Provide guidance and mentoring to less experienced staff
Drive VLSI innovation and integration of new technologies
Architect and develop block level verification environments using System Verilog and UVM methodology
Define, architect, code, and deliver verification suites/tests for ASICs
Verify large ASIC blocks independently and sign off for tape-out
Work closely with logic designers to resolve bugs and software developers
Develop Perl, Python and/or shell scripts to improve verification infrastructure
Requirements:
MSEE or BSEE is required
At least 5 years of ASIC Verification Experience
ASIC Verification using SystemVerilog
Experience in constrained-random verification
Experience with verification methodology like OVM/VMM/UVM
Perl/Tcl scripting
Experience verifying networking protocols such as Ethernet
Strong problem solving and ASIC debugging skills
Nice to have:
Constrained-random verification
Perl/Tcl scripting
Experience verifying networking protocols such as Ethernet
What we offer:
Health & Wellbeing benefits
Personal & Professional Development programs
Unconditional Inclusion environment
Comprehensive suite of benefits supporting physical, financial and emotional wellbeing
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