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ASIC Engineer, Emulation

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Meta

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Location:
United States , Sunnyvale

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Contract Type:
Not provided

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Salary:

146000.00 - 209000.00 USD / Year

Job Description:

Engineers with experience in HW emulation and prototyping required to build ASIC/System on Chip (SoC) and IP for data center applications.

Job Responsibility:

  • Deliver high-quality emulation and prototyping models on industry-standard emulation and prototyping platforms
  • Design, build, and execute comprehensive emulation test plans to ensure model accuracy and support pre-silicon validation efforts
  • Lead the development and adoption of best-in-class emulation methodologies to accelerate hardware verification and software development
  • Collaborate with Design, DV, validation, and software teams to develop tools, flows, and mechanisms that demonstrate key performance indicators such as functionality, performance, and power efficiency
  • Enhance and mature standard interfaces including PCIe, DDRx, USB, and other interfaces on emulation components such as speed bridges, transactors, and virtual components
  • Continuously improve the efficiency and effectiveness of emulation components and workflows for testing, debugging, analysis, and automation
  • Partner with vendors to troubleshoot issues, deploy new emulation capabilities, and drive ongoing improvements

Requirements:

  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • 6+ Years of experience with EDA tools and scripting languages used to build tools and flows for complex emulation environments
  • Experience with current emulation technologies and methods, simulation acceleration, in-circuit emulation, speed bridges, virtual prototyping, and hybrid methods

Nice to have:

  • Track record of successful ASIC/SoC where emulation is a critical workflow
  • Experienced in compilation and build flows and creating build flows from scratch with necessary design modifications for emulation
  • Experience in creating emulation systems for Multi-chip/SoC/IP designs and understanding of trade-offs between emulation resource consumptions, performance and ease of debug
  • Experience managing multiple programs and enabling verification to achieve coverage closure and SW to achieve left shift of software development
  • Experience with SystemVerilog and C++ to model RTL components and transactors
  • Experience with post-silicon bring up, debug, and reproducing issues on emulators
  • Experience with cadence (palladium/protium) and Synopsys (zebu) tools
  • Experience with scripting languages such as Python, Perl and TCL
What we offer:
  • bonus
  • equity
  • benefits

Additional Information:

Job Posted:
January 23, 2026

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