CrawlJobs Logo

ASIC Digital Design, Sr Engineer

synopsys.com Logo

Synopsis Engineering

Location Icon

Location:
Canada , Nepean

Category Icon
Category:
IT - Software Development

Job Type Icon

Contract Type:
Employment contract

Salary Icon

Salary:

Not provided
Save Job
Save Icon
Apply Position

Job Description:

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Responsibility:

  • Designing and verifying complex ASIC digital and mixed-signal systems using Verilog or VHDL
  • Analyzing digital and analog specifications to develop robust system-level designs
  • Collaborating on design flow analysis for CDC, synthesis, DFT, and low power methodologies to optimize performance and reliability
  • Developing, executing, and tracking comprehensive test plans to ensure thorough verification coverage
  • Performing and analyzing functional, assertion, and code coverage to validate design integrity
  • Investigating failure cases, debugging issues, and running gate-level simulations to drive resolution and product quality
  • Working closely with cross-disciplinary teams to ensure seamless integration and alignment across the design lifecycle

Requirements:

  • Master’s degree in Electrical Engineering or related field
  • At least 5 years of relevant industry experience
  • Proficient in Verilog or VHDL for digital design and verification
  • Strong familiarity with code quality metrics and methodologies
  • Experience in high-speed digital and mixed-signal design, including asynchronous clock crossings and DFT methodologies
  • Deep understanding of CDC, synthesis, and power optimization techniques
  • Simulation experience and the ability to debug collaboratively with verification teams
  • Excellent organizational and communication skills, with the ability to interface with various design groups and customer support teams

Nice to have:

  • A collaborative team player with a proactive, solution-oriented mindset
  • Detail-oriented, with a commitment to delivering high-quality results
  • Effective communicator who can bridge gaps between technical and non-technical stakeholders
  • Adaptable and resilient in a fast-paced, evolving environment
  • Motivated by innovation, continuous learning, and professional growth
What we offer:
  • Comprehensive medical and healthcare plans
  • ETO and FTO Programs
  • Maternity and paternity leave, parenting resources, adoption and surrogacy assistance
  • Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
  • Retirement plans
  • Competitive salaries

Additional Information:

Job Posted:
January 24, 2026

Employment Type:
Fulltime
Work Type:
On-site work
Icon
Synopsis Engineering - All Job Offers
Job Link Share:
Copy Link Icon
Facebook Icon Twitter Icon LinkedIn Icon

Looking for more opportunities? Search for other job offers that match your skills and interests.

Briefcase Icon

Similar Jobs for ASIC Digital Design, Sr Engineer

Asic Engineer Sr Staff

Hewlett Packard Enterprise is seeking a seasoned Design-for-Test (DFT) Engineer ...
Location
Location
United States , San Jose
Salary
Salary:
148000.00 - 340500.00 USD / Year
https://www.hpe.com/ Logo
Hewlett Packard Enterprise
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 10+ years of hands-on DFT experience in ASIC design, preferably in networking or high-speed digital domains
  • deep understanding of fault models: stuck-at, transition, path-delay
  • expertise in scan compression, ATPG, and MBIST architecture
  • experience with Siemens Tessent tools: SSN, JTAG, IJTAG, MBIST, and memory repair
  • proficiency with Synopsys tools: DFT Compiler, DFTMAX, Tetramax, Design Compiler
  • simulation experience with Synopsys VCS and Cadence NC-Verilog
  • timing analysis using PrimeTime and Cadence Tempus
  • able to define test constraints and review STA reports to ensure timing closure in test modes
  • debugging with waveform tools such as Novas and SimVision
  • familiarity with ATE pattern formats (STIL, WGL) and JTAG SVF
Job Responsibility
Job Responsibility
  • define and implement DFT architecture for high-performance networking ASICs at 3nm and beyond
  • collaborate with RTL and physical design teams to integrate scan, compression, boundary scan, and MBIST features
  • develop and validate ATPG patterns for stuck-at, transition, and path-delay fault models
  • analyze and resolve DFT-related issues including ATPG DRC violations, simulation mismatches, and timing violations
  • apply test constraints and perform STA analysis to ensure timing closure in test modes
  • support silicon bring-up and ATE pattern validation using industry-standard formats (STIL, WGL, SVF)
  • conduct silicon failure analysis and contribute to system-level debug and yield improvement
  • automate DFT flows and analysis using scripting languages such as Perl and Tcl.
What we offer
What we offer
  • health & wellbeing
  • personal & professional development
  • unconditional inclusion
  • competitive compensation, benefits, and career growth opportunities.
  • Fulltime
Read More
Arrow Right

ASIC Digital Design, Sr Staff Engineer

Our Hardware Engineers at Synopsys are responsible for designing and developing ...
Location
Location
Portugal , Moreira, Porto
Salary
Salary:
Not provided
synopsys.com Logo
Synopsis Engineering
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 6-10 years of hands-on experience in FPGA design and verification, with a focus on IP-level functional verification
  • Proficiency in Verilog and MATLAB for digital design, verification, and FPGA prototyping with logical synthesis flows
  • Strong programming and scripting skills for test automation and data analytics (Python, C/C++, TCL)
  • Strong understanding of digital and mixed-signal circuit evaluation, troubleshooting, and performance optimization techniques
  • Ability to interpret and apply digital architecture and SerDes standards documentation to develop robust verification solutions
  • Excellent technical documentation skills to ensure clear communication and knowledge transfer
Job Responsibility
Job Responsibility
  • Interpreting SerDes standards and digital, analog, and firmware architecture documents to develop verification environments and regression testcases in MATLAB
  • Evaluating and troubleshooting digital and mixed-signal circuits to ensure optimal performance and resolve complex design challenges
  • Collaborating with digital, firmware, and analog teams to solve verification challenges and improve design methodologies
  • Adapting and debugging internal verification environments to effectively replicate challenging scenarios
  • Identifying and implementing process improvements to enhance efficiency in design procedures and methodologies
  • Documenting verification environments, plans, and procedures to ensure clear communication and knowledge sharing across teams
What we offer
What we offer
  • Comprehensive medical and healthcare plans that work for you and your family
  • In addition to company holidays, we have ETO and FTO Programs
  • Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
  • Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
  • Save for your future with our retirement plans that vary by region and country
  • Competitive salaries
  • Fulltime
Read More
Arrow Right

Staff/ Sr Staff RTL Design Engineer

Synopsys software engineers are key enablers in the world of Electronic Design A...
Location
Location
India , Bengaluru
Salary
Salary:
Not provided
synopsys.com Logo
Synopsis Engineering
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 3-5 years of relevant experience in ASIC digital design and verification
  • Proficiency in RTL simulation, logic synthesis, and timing verification tools
  • Deep expertise in UVM, SystemVerilog, and protocol verification (e.g., IEEE1500, IEEE1687, AXI, AMBA)
  • Hands-on experience with VIPs and transactors in simulation and emulation environments
  • Strong understanding of DFT architectures, interconnects, and cache coherency protocols
  • Familiarity with debug tools such as Verdi and workflows for performance analysis
  • Programming skills in SystemVerilog, UVM, Verilog, C/C++, Python, and scripting languages like Tcl
  • Experience with EDA tools such as VCS, Verdi, and DC, and methodologies including VC Auto-Testbench and protocol compliance checking
Job Responsibility
Job Responsibility
  • Developing and modeling RTL logic in Verilog for embedded memory test and SLM IP blocks
  • Performing digital design validation and functional verification at both block and SoC levels
  • Executing logic synthesis, static timing analysis, and generating fault coverage reports to ensure robust designs
  • Applying DFT (Design-for-Test) expertise for comprehensive memory and logic testing
  • Identifying and troubleshooting design timing and DFT functional issues to optimize chip performance
  • Utilizing and scripting in languages such as Tcl to automate design and verification workflows
  • Defining architecture, logic, test bench designs, and embedded software functions for advanced test and analytics
  • Developing and maintaining technical collateral including test suites, protocol documentation, and debug guides
  • Collaborating with R&D and marketing teams to define new features, drive enhancements, and align product roadmaps
  • Delivering product training, managing customer support cases, and ensuring turnaround time (TAT) metrics are met or exceeded
What we offer
What we offer
  • Comprehensive medical and healthcare plans that work for you and your family
  • In addition to company holidays, we have ETO and FTO Programs
  • Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
  • Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
  • Save for your future with our retirement plans that vary by region and country
  • Competitive salaries
  • Fulltime
Read More
Arrow Right

Project Engineering Management, Sr Staff Engineer

As we extend our project management team for High-Performance Computing (HPC) de...
Location
Location
Portugal , Moreira, Porto
Salary
Salary:
Not provided
synopsys.com Logo
Synopsis Engineering
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Excellent communication skills, both oral and written, ability to summarize key points in succinct and objective way
  • A background in ASIC Design/Verification/Implementation - preferably digital
  • Excellent organizational and time-management skills, with the ability to manage multiple projects simultaneously
  • Proficiency in project management tools and software, MS Project preferred, PMP certification an advantage
  • Knowledge/experience of developing or using 3rd party IP - preferably digital
  • Proven experience in project management, with a track record of successfully leading semiconductor engineering projects, ideally in ASIC Design/verification
  • Bachelor's or master’s degree in engineering or a related field
  • Strong knowledge of engineering principles and practices
  • At least 6 years of experience
Job Responsibility
Job Responsibility
  • Collaborating with cross-functional teams to define project requirements, scope, and objectives
  • Developing detailed project plans, including timelines, resource allocation, and risk management strategies
  • Monitoring project progress and performance, identifying potential issues, and implementing corrective actions as needed
  • Communicating project status, updates, and milestones to stakeholders, ensuring transparency and alignment
  • Representing R&D on customer relationships, tracking execution to plan, aligning with senior leadership of team on mitigation and escalation management
  • Mentoring and guiding team members, fostering a collaborative and innovative work environment
What we offer
What we offer
  • We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings
Read More
Arrow Right
New

Pharmacy Technician

We’re building a world of health around every individual — shaping a more connec...
Location
Location
United States , Springfield
Salary
Salary:
17.00 - 27.00 USD / Hour
https://www.cvshealth.com/ Logo
CVS Health
Expiration Date
June 23, 2026
Flip Icon
Requirements
Requirements
  • Must comply with any state board of pharmacy requirements or laws governing the practice of pharmacy, which includes but is not limited to, age, education, and licensure/certification
  • If the state board of pharmacy does not address or mandate a minimum age requirement, must be at least 16 years of age
  • If the state board of pharmacy does not address or mandate a minimum educational requirement, must have a high school diploma or equivalent, or be actively enrolled in high school or high school equivalency program
  • State-level licensure and national certification requirements vary by state, click here to learn more
  • Regular and predictable attendance, including nights and weekends
  • Ability to complete required training within designated timeframe
  • Attention and Focus: Ability to concentrate on a task over a period of time
  • Ability to pivot quickly from one task to another to meet patient and business needs
  • Ability to confirm prescription information and label accuracy, ensuring patient safety
  • Customer Service and Team Orientation: Actively look for ways to help people, and do so in a friendly manner
Job Responsibility
Job Responsibility
  • Living our purpose by following all company SOPs at each workstation to help our Pharmacists manage and improve patient health
  • Following pharmacy workflow procedures at each pharmacy workstation (i.e., production, pick-up, drive-thru, and drop-off) for safe and accurate prescription fulfillment
  • Contributing to positive patient experiences by showing empathy and genuine care: creating heartfelt and personalized moments while serving patients at pick-up, drive-thru, and over the phone
  • keeping patients healthy by offering immunizations and other services at the register and over the phone
  • and demonstrating compassionate care by solving or escalating patient problems
  • Completing basic inventory activities, as permitted by law, and as directed by the pharmacy leadership team, such as accurately putting away medication deliveries and completing cycle counts, returns-to-stocks, waiting bin inventories, etc.
  • Contributing to a high-performing team, embracing a growth mindset, and being receptive to feedback
  • actively seeking opportunities to expand clinical and technical knowledge needed to better assist patients
  • Remaining flexible for both scheduling and business needs, while contributing to a safe, inclusive, and engaging team dynamic
  • voluntarily traveling to stores in the market to work shifts as needed by the business
What we offer
What we offer
  • medical
  • dental
  • vision coverage
  • paid time off
  • retirement savings options
  • wellness programs
  • Fulltime
Read More
Arrow Right
New

Accounting and Controlling Manager

We are looking for a strategic yet hands-on Accounting Manager to lead our finan...
Location
Location
Poland , Lodz
Salary
Salary:
Not provided
parking.net Logo
Parking Network B.V.
Expiration Date
May 25, 2026
Flip Icon
Requirements
Requirements
  • Minimum of 5 years of post-qualification experience (PQE) in a senior accounting or finance management role
  • Proven experience managing the full accounting function and local statutory audits in Poland
  • Advanced proficiency in NetSuite is essential
  • University degree in Finance/Accounting
  • professional certification (ACCA, CIMA, or KIBR) is highly preferred
  • Full fluency in Polish and English
Job Responsibility
Job Responsibility
  • Manage the end-to-end migration of accounting processes from external service providers to an internal function
  • Recruit, onboard, and mentor a local accounting team tailored to the needs of the Polish entity
  • Oversee all daily operations, including AP/AR, GL maintenance, intercompany, and fixed assets, ensuring accuracy within NetSuite
  • Lead the preparation of local statutory financial statements under Polish GAAP and ensure timely filing of VAT, CIT, R&D tax, and other local tax requirements
  • Act as the primary point of contact for external auditors, managing the annual statutory audit process for the Polish entity
  • Gradually absorb the accounting functions for additional European legal entities, standardizing processes across the region
  • Implement standardized accounting processes across the region to ensure scalability, consistency, and efficient change management
Read More
Arrow Right
New

Rotating Supervisor

Location
Location
Mozambique , Afungi - Cabo Delgado
Salary
Salary:
Not provided
lobelia.earth Logo
Lobellia
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Engineering degree in Mechanical Engineering or equivalent
  • 10+ years of experience in rotating machinery installation and supervision on major Oil & Gas / LNG megaprojects
  • Strong expertise in compressors, turbines, pumps, generators, and mechanical packages
  • Proven experience in field supervision, alignment, installation, pre commissioning, and vendor management
  • Strong HSE leadership and QA/QC mindset
  • Fluent in English (Portuguese or French is an advantage)
Job Responsibility
Job Responsibility
  • Covers the installation, inspection, preservation, alignment, and pre-commissioning readiness of all rotating equipment across EPC work packages
  • Rotating equipment includes pumps, compressors, gas turbines, blowers, generators, and mechanical packages
  • The scope spans site installation, daily field supervision, quality oversight, coordination with construction and commissioning teams, and readiness up to Mechanical Completion
  • Fulltime
Read More
Arrow Right
New

Tailor

Mend, repair, and alter guest clothing and employee uniforms by hand stitching, ...
Location
Location
Jordan , Dead Sea
Salary
Salary:
Not provided
https://www.marriott.com Logo
Marriott Bonvoy
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • No high school diploma or G.E.D. equivalent
  • At least 1 year of related work experience
  • No supervisory experience
  • None
Job Responsibility
Job Responsibility
  • Mend, repair, and alter guest clothing and employee uniforms by hand stitching, applying adhesive patches, or using a sewing machine
  • Distribute clean uniforms to personnel according to company specifications
  • Send damaged uniforms to appropriate location (e.g., seamstress, Housekeeping, outside vendor) for repair
  • Document guest requests for laundry/dry cleaning, minor repair, and pressing of garments in accordance with company specifications
  • Record assigned and unassigned uniforms as they are distributed, returned, or cleaned
  • Inspect uniforms for damage and remove substandard uniforms from circulation and issue replacements
  • Follow all company and safety and security policies and procedures
  • report any maintenance problems, safety hazards, accidents, or injuries
  • complete safety training and certifications
  • Ensure uniform and personal appearance are clean and professional
  • Fulltime
Read More
Arrow Right