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ASIC Design Verification Engineer

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Palo Alto Networks

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Location:
United States , Santa Clara

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Category:
IT - Software Development

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Contract Type:
Not provided

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Salary:

106400.00 - 172150.00 USD / Year
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Job Description:

As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking next-generation firewall products meet or exceed industry-leading requirements for features, performance, and reliability. You will define verification methodologies, architect test benches, write test plans, specify coverage, write tests, and debug. You will work on diverse platforms including simulation, emulation, formal verification, and silicon validation.

Job Responsibility:

  • Collaborate with engineers in software, architecture, design, and verification teams to create comprehensive pre-silicon verification plans across simulation, emulation, and formal verification
  • Plan and execute every aspect of simulation test plans using sophisticated coverage-driven, constrained-random methodologies
  • Develop flows, methodologies, and infrastructure for emulation
  • Create, run, and debug emulation tests in close collaboration with system architects, software engineers, and ASIC designers
  • Define new tools and methodologies to continuously improve quality and velocity
  • Create powerful programs in Python to automate triage, coverage closure, and metrics-driven verification

Requirements:

  • BS in EE, CE, or CS required or equivalent military experience required
  • MSEE preferred
  • Minimum 3 years experience in ASIC design verification
  • Demonstrated success in taking multiple ASIC products from concept to mass production
  • Expertise in SystemVerilog and UVM
  • Technical strength in the following areas is required: Defining test plans, including comprehensive adversarial testing
  • Developing rich functional coverage models
  • Creating powerful and scalable test benches
  • Implementing sophisticated self-checking infrastructure with reference models and scoreboards
  • Developing reusable constrained-random tests
  • Debugging failures
  • Closing coverage
  • Experience in the following areas is preferred: Networking and cyber security
  • Formal property verification
  • Silicon validation - bringup, test, debug, and regression
  • Creating models in Python and C/C++
  • Writing driver code in C
  • Skilled in writing powerful, modular, and scalable programs in Python, Perl, and UNIX shell to automate verification tasks, especially regression testing
  • Demonstrated ownership and independence in planning, debugging complex failures, closing metrics-driven tasks, driving vendors, and reporting status
  • Strong leadership, collaboration, and communication skills

Nice to have:

  • Networking and cyber security
  • Formal property verification
  • Silicon validation - bringup, test, debug, and regression
  • Creating models in Python and C/C++
  • Writing driver code in C

Additional Information:

Job Posted:
April 16, 2026

Employment Type:
Fulltime
Work Type:
On-site work
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