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ASIC Design Team Lead

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Arcfield

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Location:
United States , Home

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Category:
IT - Software Development

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Contract Type:
Not provided

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Salary:

130611.87 - 239061.79 USD / Year
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Job Responsibility:

  • Lead a team of ASIC design engineers to create a design document that defines the chip's features, performance, and internal components
  • Finish developing, enhancing, and debugging the VHDL/Verifog for the chip
  • Verify the functionality of the design on an HDL simulator (such as ModelSim or Xcelium) and synthesis with Synopsys or Genus
  • Perform clock domain crossing (CDC) and reset domain crossing (RDC) verification
  • Perform Design for Test (DFT) and add specific related logic (i.e. memory BIST and JTAG scan chains) to the design
  • Develop and port the RTL to an FPGA prototyping board
  • Perform place and route of the netlist prior to tapeout, this includes clock tree synthesis (CTS)
  • Help the design team run static timing analysis and power analysis after the CTS and place and route
  • Packaging and an evaluation board for the physical chip must also be performed
  • Supervise the development and maintenance of technical procedures, documentation, and manuals and lead the Design team to compile and analyze operational data and direct tests to establish standards for new designs or modifications to existing equipment, systems, or processes
  • Coordinate and consult with research engineers or scientists and customer representatives to resolve design problems

Requirements:

  • Bachelor degree in Hardware or Electrical Engineering (EE) with 12-15 years of experience or a Master's degree in Hardware or Electrical Engineering (EE) with 10-13 years of experience or a Ph.D in Hardware or Electrical Engineering (EE) with 10+ years of experience
  • Must be able to obtain and maintain a Secret clearance
  • Minimum 3 years experience with targeting VHDL designs to Xilinx FPGA's
  • Minimum 3 years experience using Cadence Virtuoso
  • Minimum 5 years experience developing in VHDL and Verilog (or system Verilog)
  • Minimum 3 years experience using ModelSim/QuestaSim
What we offer:
  • Health Insurance
  • Life Insurance
  • Paid Time Off
  • Holiday Pay
  • Short Term and Long-Term Disability
  • Retirement and Savings
  • Learning and Development opportunities
  • wellness programs as well as other optional benefit elections

Additional Information:

Job Posted:
April 23, 2026

Employment Type:
Fulltime
Work Type:
Remote work
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