ASIC Design Engineer Job at Hewlett Packard Enterprise (Roseville)

ASIC Design Engineer

This role has been designed as ‘Onsite’ with an expectation that you will primar...

Location

United States , Sunnyvale

Salary:

120000.00 - 243000.00 USD / Year

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Bachelor’s degree in Electrical Engineering required (Master’s strongly desired) with 4+ years of relevant experience
Strong analytical/problem solving skills
Knowledge of Computer Architecture/networking protocols through graduate level courses or prior work is a plus
Strong coding skills in Verilog/System Verilog through courses/projects and previous work experience is desired
Knowledge of synthesis/lint and other state-of-the-art EDA tools is desired
Excellent written and verbal communications skills are good to have
Knowledge of Perl/Python is a plus
Experience with AI agentic tools is a plus

Job Responsibility

Start with a functional specification of a module and produce a detailed micro-architecture specification that meets the power/area requirements
Implement the design using Verilog or System Verilog
Write functional coverage/SVA to help verification catch corner case bugs
Work with the Physical Design team for optimal floorplan and timing closure
Identify and fix timing in RTL to meet the frequency target
Work with the Verification team to make sure your block is fully validated
Provide mentoring/guidance to new college-grad engineers and interns

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Fulltime

ASIC Design Engineer

Aruba is an HPE Company, and a leading provider of next-generation network acces...

Location

India , Kolkata

Salary:

Not provided

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Strong Verilog RTL coding skills
Knowledge of Synopsys Design Compiler, Verplex LEC, and Spyglass is desirable
Experience designing ASICs for networking protocols (Ethernet, FCoE) is a plus
Knowledge of high performance memory subsystems
Knowledge of multi-domain clock synchronization and high-speed serial interfaces
Strong problem solving and ASIC debugging skills
Excellent written and verbal communications skills
MSEE or BSEE is required
8+ years of design experience in ASIC or related fields
Proficiency in Verilog, VHDL, and design tools like Synopsys or Cadence

Job Responsibility

Define and architect high-performance blocks for the latest, most advanced networking ASICs
Perform micro-architecture and logic design to deliver maximum throughput, while using minimum power
Collaborate with the verification team in the development of the testplan and assist in debugging test failures
Collaborate with the physical design team to develop timing constraints, analyze timing violations, and perform timing fixes

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Asic Design Engineer

Designs, analyzes, develops, modifies and evaluates VLSI components and hardware...

Location

Costa Rica , Heredia

Salary:

Not provided

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer engineering or equivalent
0-4 years of experience in VLSI design, verification or implementation
experience or understanding of electrical engineering fundamentals, VLSI principles, digital logic, and computer architecture
ability to apply analytical and problem solving skills
hands-on experience in designing VLSI components, integrated circuitry, architectures and developing algorithms
knowledge of programming and scripting, hardware description language, electronic design automation (EDA), and/or FPGA tools
coursework in VLSI design or VLSI concepts
good written and verbal communication skills
mastery in English and local language

Job Responsibility

designs portions of computer/server architecture and algorithms based on established VLSI engineering principles and in accordance with provided specifications and requirements
collaborates and communicates with management regarding design status, project progress, and issue resolution
designs, simulates, and tests VLSI circuits
ensures the VLSI designs meet quality, schedule, and cost goals for prototype or production solutions
participates as a member of project team of other VLSI engineers and internal and outsourced development partners to develop reliable, cost effective and high quality solutions for VLSI prototypes and products
provides guidance and mentoring to less experienced staff members

What we offer

comprehensive suite of benefits that supports physical, financial and emotional wellbeing
personal and professional development programs
unconditional inclusion

Fulltime

Asic Design Engineer

Designs, analyzes, develops, modifies and evaluates VLSI components and hardware...

Location

Costa Rica , Heredia

Salary:

Not provided

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer engineering or equivalent
6-10 years of experience in VLSI design, verification, or implementation
Expert level proficiency in electrical engineering fundamentals, VLSI principles, digital logic, and computer architecture
Expert level analytical and problem solving skills
Expert level knowledge of designing VLSI components, integrated circuitry, architectures and algorithms into VLSI solutions
Expert level knowledge of a programming and scripting, hardware description language, electronic design automation (EDA), and/or FPGA tools
Coursework in VLSI design or VLSI concepts
Experience in executive written and verbal communication skills
mastery in English and local language
Subject matter expertise or discipline leadership as evidenced through patents/publications in the field of VSLI or Electronic/hardware component designs and tools.

Job Responsibility

Provide technical expertise and leads project teams of Electronic and VLSI engineers and internal and outsourced development partners responsible for all stages of VLSI design and development for complex products, solutions, and platforms, including design, validation, and testing
Reviews and evaluates designs and project activities for compliance with VLSI technology and development guidelines and standards
provides tangible feedback to improve product quality
Provides VLSI-specific and technical expertise along with the overall architecture design and platform leadership to cross-organization projects, programs, and activities
Provides leadership of project team of other VLSI engineers and internal and outsourced development partners to develop reliable, cost effective and high quality solutions for VLSI prototypes and products
Provides guidance and mentoring to less experienced staff members to set an example of VLSI design and development innovation and excellence
Participates in and provides input on process for selection of future technical leaders
Drives VLSI innovation and integration of new technologies into projects and activities in the design organization.

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Fulltime

ASIC Design Engineer

Join our dynamic ASIC design team at HPE Aruba Networking, where we’re building ...

Location

United States , Roseville

Salary:

130500.00 - 300000.00 USD / Year

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or equivalent
6–10 years of experience in VLSI design, verification, or implementation
Deep understanding of digital logic, computer architecture, and VLSI fundamentals
Proficiency in RTL design (Verilog/SystemVerilog), scripting (Python/TCL), and EDA tools (Synopsys, Cadence, etc.)
Strong analytical and problem-solving skills
Excellent verbal and written communication skills
Experience working in cross-functional or global teams

Job Responsibility

Lead project teams of internal and outsourced engineers through all stages of VLSI design—from architecture and RTL to validation and physical implementation
Drive architecture and logic design decisions, ensuring alignment with performance, power, and area goals
Review and evaluate designs for compliance with internal standards and industry best practices
Collaborate across functions to integrate VLSI components into broader system platforms
Provide technical leadership and mentorship to junior engineers
Champion innovation by integrating new technologies and methodologies into our design flows
Contribute to the selection and development of future technical leaders

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Fulltime

Senior FPGA ASIC Design Engineer

Join a team at the forefront of computing innovation. This is an exceptional opp...

Location

United Kingdom , Penicuik

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Strong experience with modern, complex digital processing architectures
Deep understanding of FPGA and ASIC design flows, tools, and system-level design
Solid software development and integration skills
A proven track record of technical leadership, mentoring engineers, and driving projects from concept to delivery

Job Responsibility

Lead technical discussions and collaborate with system architects, hardware, and software engineers to define and deliver new features
Act as a technical mentor to junior engineers through design reviews, best-practice guidance, and day-to-day support
Design and implement high-quality, high-performance RTL for new features, modules, and systems
Develop software and scripts to configure, control, and test hardware modules and systems
Create clear, detailed documentation describing designs and interactions with hardware and software components
Debug complex system-level issues, identify root causes, and partner with verification teams to deliver robust solutions
Estimate development schedules and test-environment needs, and support junior engineers with project planning
Champion continuous improvement in design, validation, and development workflows
Take on increasing leadership responsibilities, with a clear path toward senior technical or team management roles

Fulltime

Asic Design Engineer Iv

The successful candidate is considered an emerging authority, who applies extens...

Location

United States , Home

Salary:

101326.82 - 243486.84 USD / Year

Arcfield

Expiration Date

Until further notice

Requirements

Bachelor degree in Hardware or Electrical Engineering (EE) with 8-10 years of experience, Masters degree in Hardware or Electrical Engineering (EE) with 6-8 years of experience or a PhD in Hardware or Electrical Engineering (EE) with 3-5 years of experience
Must be able to obtain and maintain a Secret clearance
Minimum 3 years experience with targeting VHDL designs to Xilinx FPGA's
Minimum 3 years experience using Cadence Virtuoso
Minimum 5 years experience developing in VHDL and Verilog (or system Verilog)
Minimum 3 years experience using ModelSim/QuestaSim

Job Responsibility

Create a design document that defines the chip's features, performance, and internal components
Finish developing, enhancing, and debugging the VHDL/Verifog for the chip
Verify the functionality of the design on an HDL simulator (such as ModelSim or Xcelium) and synthesis with Synopsys or Genus
Perform clock domain crossing (CDC) & reset domain crossing (RDC) verification, Design for Test (DFT) and add specific related logic (i.e. memory BIST and JTAG scan chains) to the design
Develop and port the RTL to an FPGA prototyping board
Perform place and route of the netlist prior to tapeout, this includes clock tree synthesis (CTS)
Run static timing analysis and power analysis after the CTS and place and route
Perform packaging and an evaluation board for the physical chip
Develop and maintain technical procedures, documentation, and manuals and compile and analyze operational data and conduct tests to establish standards for new designs or modifications to existing equipment, systems, or processes

What we offer

Health Insurance
Life Insurance
Paid Time Off
Holiday Pay
Short Term and Long-Term Disability
Retirement and Savings
Learning and Development opportunities
wellness programs

Fulltime

ASIC Design Engineer III

Location

United States , Home, New York

Salary:

82437.89 - 198097.02 USD / Year

Arcfield

Expiration Date

Until further notice

Requirements

Bachelor's (or equivalent) with 5-7 years of experience, or a Master's with 3-5 years of experience or a PhD with 0-2 years of experience
Must be able to obtain and maintain a Secret clearance
Minimum 3 years experience with targeting VHDL designs to Xilinx FPGA's
Minimum 3 years experience using Cadence Virtuoso
Minimum 5 years experience developing in VHDL and Verilog (or system Verilog)
Minimum 3 years experience using ModelSim/QuestaSim

Job Responsibility

Create a design document that defines the chip's features, performance, and internal components
Finish developing, enhancing, and debugging the VHDL/Verifog for the chip
Verifying the functionality of the design on an HDL simulator (such as ModelSim or Xcelium) and synthesis with Synopsys or Genus
Perform clock domain crossing (CDC) & reset domain crossing (RDC) verification, Design for Test (DFT) and add specific related logic (i.e. memory BIST and JTAG scan chains) to the design
Develop and port the RTL to an FPGA prototyping board
Perform place and route of the netlist prior to tapeout, this includes clock tree synthesis (CTS)
Run static timing analysis and power analysis after the CTS and place and route
Packaging and an evaluation board for the physical chip must also be performed
Develop and maintain technical procedures, documentation, and manuals and compile and analyze operational data and conduct tests to establish standards for new designs or modifications to existing equipment, systems, or processes

What we offer

Health Insurance
Life Insurance
Paid Time Off
Holiday Pay
Short Term and Long-Term Disability
Retirement and Savings
Learning and Development opportunities
wellness programs

Fulltime

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