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Join our dynamic ASIC design team at HPE Aruba Networking, where we’re building the next generation of high-performance networking silicon. As part of the team, you’ll contribute to the architecture, design, and implementation of complex integrated circuits that power our industry-leading products.
Job Responsibility:
Design and implement portions of computer/server architecture and algorithms using VLSI engineering principles
Simulate and verify RTL designs to ensure functionality, performance, and power goals are met
Collaborate with cross-functional teams including architecture, verification, and physical design
Participate in design reviews and contribute to continuous improvement of design methodologies
Communicate project status, technical challenges, and solutions with your team and leadership
Mentor and support junior engineers as needed
Requirements:
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field
0–4 years of experience in VLSI design, verification, or implementation
Strong understanding of digital logic, computer architecture, and VLSI fundamentals
Exposure to ASIC or FPGA design flows
Experience with Verilog/SystemVerilog and EDA tools (e.g., Synopsys, Cadence)
Familiarity with scripting languages (e.g., Python, Perl, Tcl)
Excellent communication skills and a collaborative mindset
Nice to have:
Exposure to ASIC or FPGA design flows
Experience with Verilog/SystemVerilog and EDA tools (e.g., Synopsys, Cadence)
Familiarity with scripting languages (e.g., Python, Perl, Tcl)
Excellent communication skills and a collaborative mindset
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