CrawlJobs Logo

ASIC DDR Verification Engineer

India, Hyderabad · Job Posted April 23, 2026
Apply Position
Job Link Share

Job Description

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

Job Responsibility

  • Lead the verification of high-speed Crypto/ cutting-edge DRAM Memory controller (LPDDR6, HBM4) designs, ensuring the highest standards of quality and performance
  • Architect, develop, and use simulation and/or formal-based verification environments at IP and SoC-level
  • Lead and manage verification teams, including planning, execution, tracking, verification closure, and delivery to programs
  • Develop and execute comprehensive verification plans, including testbenches and test cases
  • Collaborate with design, architecture, and software teams to define and implement verification strategies
  • Utilize advanced verification methodologies, including UVM, formal verification, and assertion-based verification
  • Mentor and guide junior engineers, fostering a collaborative and innovative team environment

Requirements

  • Proven track record in technical leadership of teams with 5+ engineers including planning, execution, tracking, verification closure, and delivery to programs
  • Experience with development of UVM and System Verilog test benches and usage of simulation tools/debug environments such as Synopsys VCS
  • Strong understanding of state of the art of verification techniques, including assertion and metric-driven verification
  • Familiarity with verification management tools as well as an understanding of database management particularly as it pertains to regression management
  • BS w/ 7+ yrs or MS w/ 5+ yrs or PhD w/ 3+ yrs in Electrical Engineering, Computer Engineering or Computer Science

Nice to have

  • Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high-performance IP and/or VLSI designs
  • Experience with formal property checking tools such as VC Formal (Synopsys), JasperGold (Cadence)
  • Experience with gate-level simulation, power-aware verification
  • Experience with silicon debug at the tester and board level
  • Experience with AI-Tools

Looking for more opportunities?

Search for other job offers that match your skills and interests.

Similar Jobs for

ASIC DDR Verification Engineer

8 matching positions

Asic/Fpga Design Verification Engineer

We are the global test and automation specialists, powering next-generation tech...
Location
Location
United States , North Reading
Salary
Salary:
98700.00 - 157900.00 USD / Year
teradyne.com Logo
Teradyne
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 3+ years of professional experience in digital logic verification or related roles
  • Experience with Cadence Xcelium or other industry-standard simulators
  • Strong experience with System Verilog and Universal Verification Methodology (UVM)
  • Working knowledge of common IP protocols (e.g., SPI, AXI, DDR)
  • Experience with RTL design using Verilog HDL
  • Familiarity with System Verilog assertion-based verification methodologies
  • Experience working within CI/CD development flows
Job Responsibility
Job Responsibility
  • Review design requirements and specifications
  • Write and review verification plans
  • Develop testbench architecture and implementation
  • Create reference models
  • Write System Verilog tests and develop UVM environments
  • perform debug
  • Collect, merge, and close functional and code coverage
  • Manage bugs and issues using a tracking tool
  • Collaborate closely with logic designers
  • Communicate technical status and risks to the team leader
What we offer
What we offer
  • medical
  • dental
  • vision
  • Flexible Spending Accounts
  • retirement savings plans
  • life and disability insurance
  • paid vacation & holidays
  • tuition assistance programs
  • discretionary bonus(es) based on financial performance
  • Fulltime
Read More
Arrow Right

Staff Design Verification Engineer

We are looking for an adaptive, self-motivative Design Verification (DV) enginee...
Location
Location
Singapore , Singapore
Salary
Salary:
Not provided
amd.com Logo
AMD
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Excellent analytical and critical thinking skills along with attention to details
  • Must be an initiative-taker, able to drive tasks independently and efficiently to completion
  • Strong/effective communication skills
  • Enthusiastic team-first mentality
  • Ability to provide mentorship and guidance to junior engineers
  • Proven experience in design verification from specification to successful silicon
  • Experience in PLL, high-speed interfaces such as DDR, PCIe and high-speed SERDES
  • Experience in designs with multiple power domains
  • Experience in designs with multiple clock domains
  • Experience in behavior modeling for Analog Circuits
Job Responsibility
Job Responsibility
  • Analyze complex verification and digital design problems and propose verification / micro-architecture solutions
  • Develop RTL and Firmware validation
  • Drive/develop ASIC verification flows and scripts
  • Create Verification architecture
  • Work with the RTL Design team to ensure functional correctness and coverage
  • Support silicon bring-up and diagnostics
  • Support Post-silicon debug, root cause bug, provide solution or workaround
Read More
Arrow Right

Staff Engineer, ASIC development Engineering

As a SoC Validation/Verification Engineer, you will play a key role in ensuring ...
Location
Location
India , Bangalore
Salary
Salary:
Not provided
sandisk.com Logo
Sandisk
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • BE or MS degree in Electrical Engineering or Computer Engineering
  • 5-8+ years of experience in SoC pre-/post-silicon verification and validation, and bring-up
  • Deep understanding of C, embedded programming, and hardware/software co-validation methodologies
  • Strong knowledge of SoC verification environments, SystemVerilog (SV), and UVM concepts
  • Proven history of developing and executing verification and validation strategies for complex SoCs
  • Experience in verification and validation of industry-standard protocols such as DDR, PCIe, LPDDR, USB, Ethernet, I²C, I3C, SPI, AXI, AHB, and APB
  • Must understand and contribute to complex SoC-level testbenches, including UVM, C, and SystemVerilog components
  • Strong experience in bring-up, including board initialization, power-on sequences, processor boot, and system-level debug for both pre- and post-silicon phases
  • Hands-on experience in post-silicon ASIC bring-up, validation, and debug
  • Should have a very good understanding of C, Python, or Perl scripting languages for test automation, data analysis, and tool development
Job Responsibility
Job Responsibility
  • Understanding complex ASIC specifications to create comprehensive Verification/Validation plans for both pre- and post-silicon validation
  • Independently developing and executing tests for verification and validation
  • Collaborating with cross-functional teams to drive closure of verification and validation activities
  • Signing off on verification and validation deliverables
  • Debugging and root cause analysis of issues found during validation
  • Developing and maintaining automated test environments and regression suites
  • Contributing to the continuous improvement of verification methodologies and best practices
  • End-to-end ownership of one or more subsystems or SoC verification and validation flows, including planning, execution, and closure
  • Run complex SoC verification and validation scenarios on Palladium/Emulation platforms to accelerate debug and improve pre-silicon coverage
  • Execute verification and validation cases in simulation environments and perform initial debug and root cause analysis
  • Fulltime
Read More
Arrow Right

Senior Engineer, ASIC Development Engineering

As a SoC Validation/Verification Engineer, you will play a key role in ensuring ...
Location
Location
India , Bengaluru
Salary
Salary:
Not provided
sandisk.com Logo
Sandisk
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • BE or MS degree in Electrical Engineering or Computer Engineering
  • 4-6 years of experience in SoC pre-/post-silicon verification and validation, and bring-up
  • Deep understanding of C, embedded programming, and hardware/software co-validation methodologies
  • Strong knowledge of SoC verification environments, SystemVerilog (SV), and UVM concepts
  • Proven history of developing and executing verification and validation strategies for complex SoCs
  • Experience in verification and validation of industry-standard protocols such as DDR, PCIe, LPDDR, USB, Ethernet, I²C, I3C, SPI, AXI, AHB, and APB
  • Run complex SoC verification and validation scenarios on Palladium/Emulation platforms
  • Must understand and contribute to complex SoC-level testbenches, including UVM, C, and SystemVerilog components
  • Execute verification and validation cases in simulation environments and perform initial debug and root cause analysis
  • Strong experience in bring-up, including board initialization, power-on sequences, processor boot, and system-level debug for both pre- and post-silicon phases
Job Responsibility
Job Responsibility
  • Understanding complex ASIC specifications to create comprehensive Verification/Validation plans for both pre- and post-silicon validation
  • Independently developing and executing tests for verification and validation
  • Collaborating with cross-functional teams to drive closure of verification and validation activities
  • Signing off on verification and validation deliverables
  • Debugging and root cause analysis of issues found during validation
  • Developing and maintaining automated test environments and regression suites
  • Contributing to the continuous improvement of verification methodologies and best practices
  • End-to-end ownership of one or more subsystems or SoC verification and validation flows, including planning, execution, and closure
  • Fulltime
Read More
Arrow Right

Staff Engineer, ASIC Development Engineering

Are you ready to push the boundaries of what's possible in technology? Join the ...
Location
Location
India , Bengaluru
Salary
Salary:
Not provided
sandisk.com Logo
Sandisk
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field with 5-8 years of experience
  • Proven experience in ASIC RTL design, with a strong grasp of Verilog/System Verilog
  • Strong understanding of SoC architecture, AMBA protocols (AXI/AHB/APB), interconnects and peripherals for debug
  • Prior knowledge of Power Intent format (UPF) and Timing Constraints (SDC) is a must
  • Proficiency in scripting languages (e.g., Python, TCL) for automation
  • Hands-on with EDA tools (simulation, lint, CDC, synthesis, formal verification)
  • Strong problem-solving skills and the ability to thrive in a dynamic environment
  • Excellent communication and teamwork abilities
Job Responsibility
Job Responsibility
  • Innovate and develop RTL code for complex ASICs
  • Contribute in SoC subsystems related to CPU complex, DDR, Host, Flash, Debug, Clocks, resets, Power domains etc. for top of the line flash controllers
  • Ensure robust design methodologies including Lint, CDC, RDC, CLP and FC-Elab
  • Utilize advanced AI-driven tools, including GitHub Copilot, to streamline the design process
  • Collaborate with DFT, PD, Hardware and Firmware teams for delivering the most optimal solution
  • Work along side with the SoC Managers and SoC Leads to deliver best-in-class solution
  • Stay abreast of the latest industry trends and emerging technologies in AI and ASIC design
  • Fulltime
Read More
Arrow Right

Staff Engineer, ASIC Development Engineering

Are you ready to push the boundaries of what's possible in technology? Join the ...
Location
Location
India , Bangalore
Salary
Salary:
Not provided
sandisk.com Logo
Sandisk
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field with 5-8 years of experience
  • Proven experience in ASIC RTL design, with a strong grasp of Verilog/System Verilog
  • Strong understanding of SoC architecture, AMBA protocols (AXI/AHB/APB), interconnects and peripherals for debug
  • Prior knowledge of Power Intent format (UPF) and Timing Constraints (SDC) is a must
  • Proficiency in scripting languages (e.g., Python, TCL) for automation
  • Hands-on with EDA tools (simulation, lint, CDC, synthesis, formal verification)
  • Strong problem-solving skills and the ability to thrive in a dynamic environment
  • Excellent communication and teamwork abilities
Job Responsibility
Job Responsibility
  • Innovate and develop RTL code for complex ASICs
  • Contribute in SoC subsystems related to CPU complex, DDR, Host, Flash, Debug, Clocks, resets, Power domains etc. for top of the line flash controllers
  • Ensure robust design methodologies including Lint, CDC, RDC, CLP and FC-Elab
  • Utilize advanced AI-driven tools, including GitHub Copilot, to streamline the design process
  • Collaborate with DFT, PD, Hardware and Firmware teams for delivering the most optimal solution
  • Work along side with the SoC Managers and SoC Leads to deliver best-in-class solution
  • Stay abreast of the latest industry trends and emerging technologies in AI and ASIC design
  • Fulltime
Read More
Arrow Right

Staff Engineer, ASIC Development Engineering

Are you ready to push the boundaries of what's possible in technology? Join the ...
Location
Location
India , Bengaluru
Salary
Salary:
Not provided
sandisk.com Logo
Sandisk
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field with 5-8 years of experience
  • Proven experience in ASIC RTL design, with a strong grasp of Verilog/System Verilog
  • Strong understanding of SoC architecture, AMBA protocols (AXI/AHB/APB), interconnects and peripherals for debug
  • Prior knowledge of Power Intent format (UPF) and Timing Constraints (SDC) is a must
  • Proficiency in scripting languages (e.g., Python, TCL) for automation
  • Hands-on with EDA tools (simulation, lint, CDC, synthesis, formal verification)
  • Strong problem-solving skills and the ability to thrive in a dynamic environment
  • Excellent communication and teamwork abilities
Job Responsibility
Job Responsibility
  • Innovate and develop RTL code for complex ASICs
  • Contribute in SoC subsystems related to CPU complex, DDR, Host, Flash, Debug, Clocks, resets, Power domains etc. for top of the line flash controllers
  • Ensure robust design methodologies including Lint, CDC, RDC, CLP and FC-Elab
  • Utilize advanced AI-driven tools, including GitHub Copilot, to streamline the design process
  • Collaborate with DFT, PD, Hardware and Firmware teams for delivering the most optimal solution
  • Work along side with the SoC Managers and SoC Leads to deliver best-in-class solution
  • Stay abreast of the latest industry trends and emerging technologies in AI and ASIC design
  • Fulltime
Read More
Arrow Right

Staff Engineer, ASIC Development Engineering

Are you ready to push the boundaries of what's possible in technology? Join the ...
Location
Location
India , Bengaluru
Salary
Salary:
Not provided
sandisk.com Logo
Sandisk
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field with 5-8 years of experience
  • Proven experience in ASIC RTL design, with a strong grasp of Verilog/System Verilog
  • Strong understanding of SoC architecture, AMBA protocols (AXI/AHB/APB), interconnects and peripherals for debug
  • Prior knowledge of Power Intent format (UPF) and Timing Constraints (SDC) is a must
  • Proficiency in scripting languages (e.g., Python, TCL) for automation
  • Hands-on with EDA tools (simulation, lint, CDC, synthesis, formal verification)
  • Strong problem-solving skills and the ability to thrive in a dynamic environment
  • Excellent communication and teamwork abilities
Job Responsibility
Job Responsibility
  • Innovate and develop RTL code for complex ASICs
  • Contribute in SoC subsystems related to CPU complex, DDR, Host, Flash, Debug, Clocks, resets, Power domains etc. for top of the line flash controllers
  • Ensure robust design methodologies including Lint, CDC, RDC, CLP and FC-Elab
  • Utilize advanced AI-driven tools, including GitHub Copilot, to streamline the design process
  • Collaborate with DFT, PD, Hardware and Firmware teams for delivering the most optimal solution
  • Work along side with the SoC Managers and SoC Leads to deliver best-in-class solution
  • Stay abreast of the latest industry trends and emerging technologies in AI and ASIC design
  • Fulltime
Read More
Arrow Right