Architecture Design Staff Job at Ayers Saint Gross (Tempe)

Architecture Design Staff

About Ayers Saint Gross: Ayers Saint Gross is an internationally recognized desi...

Location

United States , Baltimore; Washington DC

Salary:

55000.00 - 70000.00 USD / Year

Ayers Saint Gross

Expiration Date

Until further notice

Requirements

Bachelor of Architecture or Master of Architecture degree from an accredited program is required
LEED accreditation required within 12 months
Driven to achieve professional registration
Prior internship or work experience in an architecture firm preferred
Minimum GPA of 3.0
A portfolio illustrating a strong design and technical understanding of architecture
Familiarity with 3D modeling, rendering, presentation and design software such as SketchUp, Rhino, Adobe suite, and Revit
Solid MS Office skills
Ability to work well in a team environment as well as independently
Excellent graphic and verbal communication skills

Job Responsibility

Actively involved in the development of architectural projects from conception through construction documents
Perform a variety of assignments requiring skills in all conventional aspects of architectural designs for projects of moderate size and complexity

What we offer

Continuing Professional Education employee benefits
Employee-owned company
Opportunity to pursue local and professional advocacy groups
Opportunity to help with pro-bono initiatives
Comprehensive benefits

Fulltime

Senior Staff Silicon Design Engineer (Design Verification)

At AMD, our mission is to build great products that accelerate next-generation c...

Location

Malaysia , Penang

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Strong experience in ASIC/SoC design
Strong hands-on verilog development experience, familiar with scripting languages like Perl
Good experience on complicate hub,control IP design
Strong problem solving, independent thinking, teamwork and communication skills
Bachelor or Master degree in E&E or Computer Engineering. (Preferred Master Degree)

Job Responsibility

Own part of IP feature design with cooperation with other designers
As one of IP design team members, own for IP level design work, including architecture define (partly own or join), spec documentation, RTL coding, RTL delivery and signoff
The target IP is used for all AMD mainstream products, product generation upgrade, reusability and scalibility need to be considered in architecture define and RTL maintain, as well as compliant to system application and sw/fw/hw cooperation.
Need to co-work with other teams closely, include communication with AMD global soc architect and IP architect, closely work with verification team, trace and support backend work, silicon validation support.

What we offer

AMD benefits at a glance.

Staff/ Sr Staff RTL Design Engineer

Synopsys software engineers are key enablers in the world of Electronic Design A...

Location

India , Bengaluru

Salary:

Not provided

Synopsis Engineering

Expiration Date

Until further notice

Requirements

3-5 years of relevant experience in ASIC digital design and verification
Proficiency in RTL simulation, logic synthesis, and timing verification tools
Deep expertise in UVM, SystemVerilog, and protocol verification (e.g., IEEE1500, IEEE1687, AXI, AMBA)
Hands-on experience with VIPs and transactors in simulation and emulation environments
Strong understanding of DFT architectures, interconnects, and cache coherency protocols
Familiarity with debug tools such as Verdi and workflows for performance analysis
Programming skills in SystemVerilog, UVM, Verilog, C/C++, Python, and scripting languages like Tcl
Experience with EDA tools such as VCS, Verdi, and DC, and methodologies including VC Auto-Testbench and protocol compliance checking

Job Responsibility

Developing and modeling RTL logic in Verilog for embedded memory test and SLM IP blocks
Performing digital design validation and functional verification at both block and SoC levels
Executing logic synthesis, static timing analysis, and generating fault coverage reports to ensure robust designs
Applying DFT (Design-for-Test) expertise for comprehensive memory and logic testing
Identifying and troubleshooting design timing and DFT functional issues to optimize chip performance
Utilizing and scripting in languages such as Tcl to automate design and verification workflows
Defining architecture, logic, test bench designs, and embedded software functions for advanced test and analytics
Developing and maintaining technical collateral including test suites, protocol documentation, and debug guides
Collaborating with R&D and marketing teams to define new features, drive enhancements, and align product roadmaps
Delivering product training, managing customer support cases, and ensuring turnaround time (TAT) metrics are met or exceeded

What we offer

Comprehensive medical and healthcare plans that work for you and your family
In addition to company holidays, we have ETO and FTO Programs
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
Save for your future with our retirement plans that vary by region and country
Competitive salaries

Fulltime

Staff Engineer, VLSI Design Engineering (Analog Design)

Successful candidates will work with the Non-volatile Memory Design team to arch...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

BTech/MTech from Premier institute
4+ years design experience in Analog Circuits like Amplifiers, Bandgap, LDOs, Oscillators, switching circuit etc.
Understanding of layout and its impact on circuits
Well versed with industry tools to do analog design
Exposure to full chip simulations
Excellent documentation skills
Written and verbal communication skills
Good Team player, flexible and adapting to learn outside analog design e.g system integration, silicon validation

Job Responsibility

Design, simulate, and verify critical circuits like Voltage regulators, LDO, Current and Voltage reference, High Voltage charge pumps, temperature sensors, oscillators etc using industry standard EDA tools
Work with layout engineers and closely interact during the design phase by reviewing layout and providing input as needed and perform post layout simulations (Back-annotation) of Analog blocks
Participate in Full chip verification to ensure analog block functionality at chip level
Build understanding on the analog function/circuit usage in system and its impact on chip power/area/performance
Detailed Documentation of Module specifications, signal list, layout guidelines and Checklist
Propose innovative circuit solutions and design methodologies. Document and present new architectures, new and enhanced circuit designs, and simulation results during design reviews
Verify and characterize silicon using lab equipment’s and testers. Corelate the simulation data with silicon data and document the learning
Mentor junior engineers to learn and deliver the assignment
Ensure timelines and quality of assigned assignments

Fulltime

Staff Engineer, VLSI Design Engineering (Analog Design)

Successful candidates will work with the Non-volatile Memory Design team to arch...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

BTech/MTech from Premier institute
4+ years design experience in Analog Circuits like Amplifiers, Bandgap, LDOs, Oscillators, switching circuit etc.
Understanding of layout and its impact on circuits
Well versed with industry tools to do analog design
Exposure to full chip simulations
Excellent documentation skills
Written and verbal communication skills
Good Team player, flexible and adapting to learn outside analog design e.g. system integration, silicon validation

Job Responsibility

Design, simulate, and verify critical circuits like Voltage regulators, LDO, Current and Voltage reference, High Voltage charge pumps, temperature sensors, oscillators etc. using industry standard EDA tools
Work with layout engineers and closely interact during the design phase by reviewing layout and providing input as needed and perform post layout simulations (Back-annotation) of Analog blocks
Participate in Full chip verification to ensure analog block functionality at chip level
Build understanding on the analog function/circuit usage in system and its impact on chip power/area/performance
Detailed Documentation of Module specifications, signal list, layout guidelines and Checklist
Propose innovative circuit solutions and design methodologies. Document and present new architectures, new and enhanced circuit designs, and simulation results during design reviews
Verify and characterize silicon using lab equipment’s and testers. Corelate the simulation data with silicon data and document the learning
Mentor junior engineers to learn and deliver the assignment
Ensure timelines and quality of assigned assignments

Fulltime

Staff Design Verification Engineer

We are looking for an adaptive, self-motivative Design Verification (DV) enginee...

Location

Singapore , Singapore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Excellent analytical and critical thinking skills along with attention to details
Must be an initiative-taker, able to drive tasks independently and efficiently to completion
Strong/effective communication skills
Enthusiastic team-first mentality
Ability to provide mentorship and guidance to junior engineers
Proven experience in design verification from specification to successful silicon
Experience in PLL, high-speed interfaces such as DDR, PCIe and high-speed SERDES
Experience in designs with multiple power domains
Experience in designs with multiple clock domains
Experience in behavior modeling for Analog Circuits

Job Responsibility

Analyze complex verification and digital design problems and propose verification / micro-architecture solutions
Develop RTL and Firmware validation
Drive/develop ASIC verification flows and scripts
Create Verification architecture
Work with the RTL Design team to ensure functional correctness and coverage
Support silicon bring-up and diagnostics
Support Post-silicon debug, root cause bug, provide solution or workaround

Staff Design Verification Engineer

As a Design Verification Engineer on the Infinity Fabric verification team, you ...

Location

United States , Boxborough

Salary:

144800.00 - 217200.00 USD / Year

AMD

Expiration Date

Until further notice

Requirements

Project level experience with design concepts and RTL implementation for same
Experience with functional verification tools by VCS, Cadence, Mentor Graphics
Good understanding of computer organization/architecture
Bachelors or Master's degree in computer engineering/electrical engineering preferred

Job Responsibility

Develop and enhance UVM-based testbenches to verify new features for a state-of-the-art industry leading Data Fabric IP for AMD’s CPUs, GPUs and APUs
Work closely with other verification engineers, designers, architects, and performance engineers to understand and verify the functionality of a given design element within the context of the block, chip and overall system
Execute test plans for constrained-random and directed tests, new checks and functional coverage
Write tests, sequences, and testbench components in SystemVerilog and UVM to achieve verification of the design
Responsible for verification quality metrics like pass rates, code coverage and functional coverage

Fulltime

Staff Design Systems Designer

We’re looking for Ethos’ first Design Systems Designer to build and evolve the d...

Location

United States

Salary:

126000.00 - 224000.00 USD / Year

Ethos

Expiration Date

Until further notice

Requirements

7+ years of relevant experience, with a track record of setting system strategy, driving cross-team adoption, and raising the bar for design quality across an organization
Strong product design foundation with excellent visual and interaction craft
Hands-on experience building and maintaining design systems in Figma, including component architecture, documentation, and scalable patterns
Strong working fluency with modern front-end concepts (tokens, components, states, responsive behavior)
Experience setting accessibility standards and shipping accessible components (WCAG-informed practices, inclusive design thinking)
Ability to thrive in ambiguity and build structure where it doesn’t yet exist
Clear communicator who can align diverse stakeholders and influence without relying on formal authority
A portfolio that demonstrates end-to-end design system thinking and real-world impact (adoption, quality, speed, consistency)

Job Responsibility

Establish the vision, principles, and roadmap for Ethos’ design system
Audit the current system, product UI and identify the highest-leverage opportunities to standardize patterns and reduce inconsistency
Define a scalable token strategy (color, typography, spacing, elevation, motion, etc.) and a clear approach to theming and brand expression across products
Design, build, and maintain Figma libraries (components, styles/variables, templates, and patterns)
Create high-quality component specifications with clear interaction behavior, states, responsive guidance, and accessibility considerations
Ensure the system supports narrative, conversion-driven experiences
Partner with Design System / Front-End engineers to translate the system into reusable code components and tokens
Align on workflows that keep design and code in sync
Drive pragmatic adoption
Build documentation

Fulltime

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Architecture Design Staff

Job Description

Job Responsibility

Requirements

What we offer

Looking for more opportunities?

Architecture Design Staff

Architecture Design Staff

Senior Staff Silicon Design Engineer (Design Verification)

Staff/ Sr Staff RTL Design Engineer

Staff Engineer, VLSI Design Engineering (Analog Design)

Staff Engineer, VLSI Design Engineering (Analog Design)

Staff Design Verification Engineer

Staff Design Verification Engineer

Staff Design Systems Designer

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