Analog Design Engineer

New

Sr. High Speed Analog Design Engineer

This job opening is for a circuit designer in a team responsible for high-precis...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Strong hands-on experience in DDR circuit designs in latest process technology nodes
Good technical knowledge of power-performance trade-offs in high-speed DDR and/or SerDes architectures
Direct experience in all phases of design analysis including functional, static timing and electrical sign-off
Strong understanding of the impact of variation on design performance
Masters in Electrical/Electronics Engineering, with specialization in microelectronics or something similar

Job Responsibility

Complete ownership of individual circuit blocks in a DDR PHY design in cutting edge process technology nodes
Responsible for circuit design, layout quality, electrical and timing analysis, and reliability checks
Interface with cross-functional teams like RTL, Verification and Physical Design

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great prod...

Location

United States , Boxborough

Salary:

169600.00 - 254400.00 USD / Year

AMD

Expiration Date

Until further notice

Requirements

PhD in Electrical Engineering or related fields or M.S. with relevant experience with extensive design experience in both optical and electrical transceiver design

Job Responsibility

Transceiver circuit/link micro-architecture definition, implementation, verification, and documentation: clock generation and distribution, data path, DSP, CDR, calibration & adaptation loops
Top-level and block-level electrical/optical link budgeting and modeling
Circuit design spec definition of transceiver building blocks (ADC, DAC, PLL, clock distribution, receiver front-end, transmitter front-end, serializer, deserializer, etc.)

Fulltime

Analog Design Engineer

This job opening is for a circuit designer in a team responsible for high-precis...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Masters in Electrical/Electronics Engineering, with specialization in microelectronics or something similar
Strong hands-on experience in SerDes and/or DDR circuit designs in latest technology nodes, including Finfet
Good technical knowledge of power-performance trade-offs in high-speed SerDes designs
Direct experience in all phases of design analysis including functional, static timing and electrical sign-off
Strong understanding of the impact of variation on design performance
Strong circuit design knowledge
Clear communication and presentation skills
Diligent documentation of work

Job Responsibility

Complete ownership of individual circuit blocks in a SerDes PHY design in cutting edge FinFet technology nodes
Responsible for circuit design, layout quality, electrical and timing analysis, and reliability checks
Interface with cross-functional teams like RTL, Verification and Physical Design

Senior Analog Design Engineer

The Interface & Custom Circuit Engineering team in AI-Silicon Engineering is see...

Location

India , Bangalore

Salary:

Not provided

Microsoft Corporation

Expiration Date

Until further notice

Requirements

BSEE or equivalent, MSEE/PhD preferred
7+ years of experience in analog circuit design, through full cycle post BSEE or equivalent
Experience with high-speed analog front-end serdes or D2D design (preferably PCIe, UCIe, D-PHY, USB), data-converters, PLLs, Regulators and all associated blocks in analog designs from architecture till silicon validation support
Experience in Design partitioning, power/jitter budgeting and timing analysis
Knowledge of lower power design techniques, calibration, parasitic extraction, EM/IR/ESD/Aging & Signal Integrity Design
Experience with the use of CAD-tools (Cadence, Mentor, Synopsys) for circuit schematic entry, simulations, post layout extractions, Mixed-mode simulations
Delivered Analog IP’s successfully in mass production in FinFET processes
Experience in mentoring individual engineers
Working with multiple stakeholders (arch/design/layout/silicon validation/project managers) to execute full design cycle till silicon
Excellent communication skills and self-motivated that can collaborate with larger teams within Microsoft

Job Responsibility

Lead Analog designs and delivery of cutting edge, high-performance, high-speed, low-power Analog IP designs for interconnectivity solutions and fundamental Analog circuit blocks for various Microsoft products in various process nodes including deep FinFet, following industry best practices
Technically deliver complex blocks that will produce schematics, verify in simulation, complete timing/jitter/power budgets and work with mask layout teams to deliver a final IP GDS
Coordinate tasks with junior members of the team, develop plans for Analog IP execution, follow processes/methodologies to deliver IP blocks
Coordinate bench validation of IP in Silicon, and IP characterization on bench and tester
Use established flows/methodologies/processes for execution
Work along with other members of the team to deliver IP’s, including project planning, schedule tracking, report generation
Interface with RTL, Verification and P&R team

Fulltime

Senior Analog Design Engineer

Our Hardware Engineers at Synopsys are responsible for designing and developing ...

Location

India , Hyderabad

Salary:

Not provided

Synopsis Engineering

Expiration Date

Until further notice

Requirements

MTech/MS with 2+ years or BTech/BS with 4+ years of practical analog IC design experience in Electrical or Computer Engineering (or related field)
Proven expertise with FinFET technologies and CMOS tape-outs
Deep understanding of Multi-Gbps high-speed designs (PAM4, NRZ) and SERDES architectures
Extensive design experience with SERDES sub-circuits (e.g., TX, RX, adaptive equalizers, PLL, DLL, BGR, regulators, oscillators, ADC/DAC)
Skilled in analog/digital co-design, calibration, adaptation, and timing handoff for optimized circuit performance
Familiarity with ESD protection, custom digital design, and design for reliability (EM, IR, aging, self-heating)
Proficient with schematic entry, physical layout, design verification tools, and SPICE simulators
Experience with scripting languages (TCL, PERL, MATLAB) for post-processing simulation results
Understanding of system-level budgeting (jitter, amplitude, noise) and signal integrity (packaging, parasitics, crosstalk)
Excellent communication and documentation skills

Job Responsibility

Reviewing SerDes standards to develop novel transceiver architectures and detailed sub-block specifications
Investigating and architecting circuit solutions that address performance bottlenecks, enabling significant improvements in power, area, and speed
Collaborating with cross-functional analog and digital design teams to streamline design and verification processes for optimal efficiency and quality
Overseeing and guiding the physical layout to minimize parasitics, device stress, and process variations, ensuring robust silicon performance
Presenting and reviewing simulation data with internal teams and external stakeholders, including industry panels and customer reviews
Documenting design features, test plans, and results, and consulting on electrical characterization and post-silicon analysis for product enhancements
Analyzing customer silicon data to identify design improvement opportunities and proposing solutions for post-silicon updates

What we offer

Comprehensive medical and healthcare plans that work for you and your family
In addition to company holidays, we have ETO and FTO Programs
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
Save for your future with our retirement plans that vary by region and country
Competitive salaries

Fulltime

Staff Analog Design Engineer

Our Hardware Engineers at Synopsys are responsible for designing and developing ...

Location

India , Hyderabad

Salary:

Not provided

Synopsis Engineering

Expiration Date

Until further notice

Requirements

MTech/MS with 4+ years or BTech/BS with 5+ years of practical analog IC design experience in Electrical or Computer Engineering (or related field)
Proven expertise with FinFET technologies and CMOS tape-outs
Deep understanding of Multi-Gbps high-speed designs (PAM4, NRZ) and SERDES architectures
Extensive design experience with SERDES sub-circuits (e.g., TX, RX, adaptive equalizers, PLL, DLL, BGR, regulators, oscillators, ADC/DAC)
Skilled in analog/digital co-design, calibration, adaptation, and timing handoff for optimized circuit performance
Familiarity with ESD protection, custom digital design, and design for reliability (EM, IR, aging, self-heating)
Proficient with schematic entry, physical layout, design verification tools, and SPICE simulators
Experience with scripting languages (TCL, PERL, MATLAB) for post-processing simulation results
Understanding of system-level budgeting (jitter, amplitude, noise) and signal integrity (packaging, parasitics, crosstalk)
Excellent communication and documentation skills

Job Responsibility

Reviewing SerDes standards to develop novel transceiver architectures and detailed sub-block specifications
Investigating and architecting circuit solutions that address performance bottlenecks, enabling significant improvements in power, area, and speed
Collaborating with cross-functional analog and digital design teams to streamline design and verification processes for optimal efficiency and quality
Overseeing and guiding the physical layout to minimize parasitics, device stress, and process variations, ensuring robust silicon performance
Presenting and reviewing simulation data with internal teams and external stakeholders, including industry panels and customer reviews
Documenting design features, test plans, and results, and consulting on electrical characterization and post-silicon analysis for product enhancements
Analyzing customer silicon data to identify design improvement opportunities and proposing solutions for post-silicon updates

What we offer

Comprehensive medical and healthcare plans that work for you and your family
Time Away: In addition to company holidays, we have ETO and FTO Programs
Family Support: Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
ESPP: Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
Retirement Plans: Save for your future with our retirement plans that vary by region and country
Competitive salaries

Fulltime

Analog Design, Staff Engineer

In this role, you will work on the design, development, and refinement of Multi-...

Location

Canada , Ottawa

Salary:

Not provided

Synopsis Engineering

Expiration Date

Until further notice

Requirements

Ph.D., M.Sc. with 3+ years, or B.Sc. with 5+ years of practical analog IC design experience
degree in Electrical Engineering or Computer Engineering or other relevant field of study
In depth familiarity with transistor level circuit design - sound CMOS design fundamentals
Detailed design experience with one, and familiarity with several other SERDES sub-circuits: receive equalizers, samplers, voltage/current-mode drivers, serializers, deserializers, voltage-controlled oscillator, phase mixer, delay-locked loop, phase locked loop, bandgap reference, ADC, DAC
Familiarity with custom digital design (i.e. high-speed logic paths)
Experience with analog/digital interactions for optimizing circuit performance (calibration, adaptation, timing-handoff, etc)
Understanding of design for reliability (i.e. EM, IR, aging, etc.) and layout effects (i.e. matching, reliability, proximity effects, etc.) as well as ESD issues (i.e. circuit techniques, layout)
Experience with tools for schematic entry, physical layout, and design verification
Understanding of SPICE simulators and simulation methods
Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture

Job Responsibility

Review SERDES standards to develop novel transceiver architectures and sub-block specifications
Investigate and develop circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area, and performance targets
Oversee physical layout to minimize the effect of parasitics, device stress, and process variation
Present and review simulation data from internal project teams
Document design features and test plans
Consult on the overall electrical characterization of the SERDES IP product. Review customer silicon data for design enhancements. Propose solutions for post-silicon design updates

What we offer

Comprehensive medical and healthcare plans
Time Away in addition to company holidays, ETO and FTO Programs
Family Support including maternity and paternity leave, parenting resources, adoption and surrogacy assistance
ESPP - Purchase Synopsys common stock at a 15% discount
Retirement Plans
Competitive salaries

Fulltime

Serdes Analog Mixed-Signal Design Expert

AMD Serdes Technology Group develops high-performance electrical and optical tra...

Location

United States , San Jose

Salary:

216000.00 - 324000.00 USD / Year

AMD

Expiration Date

Until further notice

Requirements

PhD in Electrical Engineering or a related field or MS with relevant industrial experience in optical and/or electrical transceiver design
experience designing 200G+ CMOS transceivers, with a deep understanding of high-speed electrical and/or optical interface requirements
demonstrated proficiency in hands-on circuit optimizations, including tuning for power, performance, and area at both block and system levels
proven track record in silicon productization—from initial design through to bring-up, validation, and successful ramp to mass production

Job Responsibility

Own performance-critical analog mixed-signal circuit blocks used in Serdes, such as high-speed data converters (DAC and ADC), clocking (reference clock, PLL, clock dividers, muxes, buffers, regulators, multi-phase clock generators, error detection and correction), and analog front-end circuits (pad matching networks, ESD, CTLE, linear amplifier)
define circuit-driven micro-architectures of Tx and Rx subsystems and drive sub-block level specs
own power, performance, area, and jitter budgets of analog design blocks
mentor sub-block owners and conduct peer reviews of design and verification results
work with pre-tapeout verification and post-silicon validation teams to bring up silicon and analyze silicon results

Fulltime

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Analog Design Engineer - SerDes

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