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Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs.
Job Responsibility:
Working on the design and analysis of 3D integrated products
Combination of traditional ASIC/SoC physical design skills, packaging, power, clock and cooling analysis
Work closely with the architecture and RTL team to do R&D on novel concepts for 3D integration
Requirements:
10+ years of physical design/verification experience
Strong knowledge of block level and full-chip physical verification methodology
Expert at optimizing for the best power/performance and area
Experience with the complete physical design flow
Expert with ICV or Calibre tools resolving block and full-chip DRC and LVS issues
Expert with IR/EM analysis and resolution
Strong ability in scripting languages like Tcl and Python
Ability to make flow enhancements
Demonstrated ability to work with RTL teams to optimize for physical design
Knowledge of 2.5D or 3D packaging solutions
Nice to have:
Experience doing full chip floor planning and integration
Knowledge of clock distribution
Knowledge of cooling analysis
What we offer:
Build a breakthrough AI platform beyond the constraints of the GPU
Publish and open source their cutting-edge AI research
Work on one of the fastest AI supercomputers in the world
Enjoy job stability with startup vitality
Simple, non-corporate work culture that respects individual beliefs