Testing Developer United States, Santa Clara Jobs

Lead Test Development Engineer role in Santa Clara. Define and implement DFT architecture for FPGA manufacturing, using tools like TestMax and Tessent. Requires 10+ years in DFT, ATPG, MBIST, and scripting. Drive test solutions from silicon bring-up to high-volume production.

Lead test development for cutting-edge FPGA integrated circuits at Achronix. This Santa Clara-based role requires deep Advantest V93000 ATE expertise and 10+ years in semiconductor test engineering. You will manage programs, optimize yield, and drive cost-effective manufacturing strategies.