Principal Design Engineer Jobs (On-site work)

Lead structural design for major infrastructure projects in Doha as Principal Design Engineer at AECOM. Requires 15+ years in structural engineering, 5+ years in leadership, and expertise in SAP2000, ETABS, Revit, and Middle East building codes.

Lead silicon photonic IC design at Voyant Photonics in NYC, driving chip-scale LiDAR and optical circuit switches for AI data centers. Requires PhD, 7+ years PIC design experience, and full tapeout ownership.

Lead the end-to-end architecture of a custom AMS ASIC for an implantable neural interface in Alameda, CA. Requires 10+ years of AMS IC design, multiple tapeouts, and low-noise ultra-low-power expertise.

Lead SSD system design and architecture at Micron in Longmont, CO. Requires 6+ years in SSD development, deep PCIe/NVMe expertise, and strong cross-functional leadership. Shape next-gen storage solutions.

Lead AI/ML innovation in EDA at Renesas as Principal Engineer in Hyderabad or Bangalore. Requires 15+ years in AI/ML, GenAI and Agentic AI, plus Tcl/Perl/Python scripting for RTL-to-GDS flows.

Lead SoC verification at Renesas in Hyderabad as Principal Engineer - Design Verification. Requires 14+ years in SoC verification, UVM, System Verilog, AHB/AXI and memory controllers. Drive next-gen MCU/MPU verification.

Lead analog and mixed-signal IC design at WD in San Jose. Requires hands-on CMOS expertise (40nm and below), EDA tools proficiency, and a proven record of successful tape-outs and mass production.

Lead digital architecture for UA Link Switch products at Renesas in Bengaluru. Requires 15+ years in digital ASIC/SoC development, RTL design, and high-speed interconnect expertise. Shape next-gen semiconductor solutions.

Renesas seeks a Principal Digital Design Engineer in Duluth to architect RTL for DDR5/DDR6 memory buffer chips powering AI and cloud data centers. Requires 12+ years of ASIC/IC design expertise and strong Verilog skills.