Digital Engineer United States Jobs

Join Brainlab as a Biomedical Engineer (Digital OR Clinical Specialist) in San Antonio. Support surgical teams, manage Digital OR systems, and drive product utilization. Requires IT or biomedical engineering degree and 1-3 years technical support experience.

Lead the 0-to-1 phase of digital media software at Avery Dennison in Dallas. Seeking a Principal Engineer with 7+ years experience in C#/.NET, Java or Go, cloud architecture and hardware integration.

Lead the 0-to-1 phase of digital media software at Avery Dennison in Dallas. Seeking a Principal Engineer with 7+ years experience in C#/.NET, Java or Go, cloud architecture and hardware integration.

Lead the 0-to-1 phase of digital media and ESL software solutions at Avery Dennison in Little Rock. Requires 7+ years engineering experience, C#/.NET or Go backend skills, and cloud architecture expertise.

Lead RTL design for complex SoCs at Astera Labs in San Jose. Requires 5+ years in SoC/silicon for server, storage or networking, plus timing closure and DFT skills. Scripting automation and RISC-V/Arm a plus.

Join Semgrep as a Sales Solutions Engineer in the US, guiding developers to build secure applications. Leverage 5-8 years of pre-sales or customer success experience and CI/CD expertise. Uncapped earnings $217k-$272k plus equity.

Join Anduril as a Digital Tools Engineer in Costa Mesa to drive manufacturing software strategy. Requires 5+ years with MES, ERP, PLM systems and strong stakeholder communication skills. Shape cutting-edge defense technology.

Own Hometap's product and marketing event data as a Digital Analytics Engineer in Boston. Manage Segment tracking plans, event taxonomy, and schema validation while partnering across teams. Requires 2+ years in analytics, SQL, and JSON Schema skills.

Micron seeks a Digital Circuit Design Engineer in Boise to shape core RTL circuits for DRAM products. Requires 6+ years of RTL design, STA, and timing closure expertise with Cadence tools.

Lead ASIC digital design at Micron in Minneapolis. Requires 8+ years, strong SystemVerilog RTL skills, and DRAM/memory controller expertise. Shape next-gen memory solutions with competitive pay.

Join Efficient Computer in San Francisco as a Digital Verification Engineer. Build UVM/SystemVerilog testbenches, drive coverage closure, and debug simulations. Requires 4+ years ASIC/SoC verification experience and Python skills.

Senior Digital Design Engineer role at Analog Devices in the US, developing FPGA-based designs for aerospace and defense applications. Requires high-speed PCB design, RTL skills, and U.S. citizenship with Secret Clearance eligibility.

Accenture Federal Services seeks a Digital Engineer in Honolulu to lead enterprise logistics platform integration and digital transformation. Requires 7+ years in systems engineering and expertise in SharePoint and data analytics.

Lead mixed-signal electrical design for cUAS systems at Axon in Sterling. Requires expertise in high-speed digital, FPGA, RF, and EMI/EMC with Altium proficiency. Competitive salary, 401k match, and comprehensive benefits.

Join Anduril as a Digital Tools Engineer in Costa Mesa to lead supply chain system projects end-to-end. Requires 4+ years in ERP/MRP administration and strong project management skills.

Senior Digital Platform Support Engineer to own Vercel platform operations for enterprise web apps. Requires 5+ years AWS, AEM as Cloud Service expertise, and Next.js/React knowledge. Hybrid role in Chicago, Peoria, Dallas, Broomfield or Cary with full benefits.

Lead mixed-signal electrical design for cUAS systems at Axon/Dedrone in Sterling. Requires EE degree, Altium, FPGA, RF and EMI/EMC expertise. Competitive salary, 401k match, paid parental leave.

Renesas seeks a Principal Digital Design Engineer in San Jose to lead SOC architecture and RTL development. Requires 8+ years experience, strong protocol knowledge, and offers a dynamic, multicultural environment.

Lead digital RTL design role in Austin focused on advanced power management ICs. Requires 10+ years of EE/ECE experience, Verilog, CDC/RDC/LINT clean design, and serial interface expertise. Includes technical mentorship and design automation.

Renesas seeks a Principal Digital Design Engineer in San Jose to lead SOC architecture and RTL design. Requires MSEE/PhD with 8+ years experience, strong protocol knowledge, and AI-savvy mindset.