Renesas Electronics - Italy, Catania, Manufacturing

Renesas seeks a Staff Analog Engineer in Catania to design smart power stages and power management ICs. Requires 8+ years BSEE experience, Cadence proficiency, and strong analog design skills.

Senior Validation Engineer role in Catania for post-silicon validation of mixed-signal and power management ICs. Requires bench validation experience, Python automation skills, and lab equipment proficiency. Join a global team ensuring silicon meets electrical and performance specs.

Senior digital design role in Catania for an engineer with 8-12 years of experience and EE/ECE degree. Work on advanced power management ICs, leading RTL design, verification and automation with Verilog and SystemVerilog.

Renesas seeks an MSc Electronic Engineering student for a six-month analog design internship in Catania, Italy. Join the Performance Computing Power team to research Power Management ICs and Smart Power Stages. Gain hands-on Cadence experience with expert mentorship.

Renesas seeks an MSc Electronic Engineering student for a six-month internship in Catania, Italy. Join the Performance Computing Power team to research analog and mixed-signal IC design, focusing on Power Management ICs and Smart Power Stages.