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Astera Labs - Singapore

3 Job Offers

Job Offers

Principal Physical Design Engineer

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Join Astera Labs as a Principal Physical Design Engineer in Singapore. Lead block and top-level implementation in advanced nodes, drive timing closure, and integrate high-speed IPs. 5-10 years of experience required.
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Salary
Not provided
Astera Labs
Expiration Date
Until further notice

Teach Lead Physical Design Engineer

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Lead Physical Design Engineer role at Astera Labs in Singapore. Requires 5+ years in physical design, advanced nodes, Synopsys ICC2/Cadence Innovus, and high-speed IP integration for AI infrastructure.
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Salary
Not provided
Astera Labs
Expiration Date
Until further notice

Tech Lead Analog Mixed-Signal IC Layout Engineer

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Lead Analog Mixed-Signal IC Layout at Astera Labs in Singapore. Requires VLSI/Computer Architecture background, Verilog/SystemVerilog, UVM and Python/C++ skills. Join the AI connectivity revolution!
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Salary
Not provided
Astera Labs
Expiration Date
Until further notice