Achronix Semiconductor - United States

Lead test development for cutting-edge FPGA integrated circuits at Achronix. This Santa Clara-based role requires deep Advantest V93000 ATE expertise and 10+ years in semiconductor test engineering. You will manage programs, optimize yield, and drive cost-effective manufacturing strategies.

Join our team in Santa Clara as a Hardware Test Automation Engineer. You will develop Python frameworks to validate PCBs and systems, focusing on PCIe Gen5 and 106G Ethernet. This hands-on lab role requires expertise in lab equipment, PCB architecture, and scripting to ensure product robustness.

Join Achronix in Santa Clara as a System Validation Engineer. You will design and run validation tests for cutting-edge PCIe Gen5 and 106G Ethernet hardware on accelerator cards. This senior role requires deep expertise in PCIE/Ethernet protocols, PCB architecture, and Python scripting for automa...

Lead Test Development Engineer role in Santa Clara. Define and implement DFT architecture for FPGA manufacturing, using tools like TestMax and Tessent. Requires 10+ years in DFT, ATPG, MBIST, and scripting. Drive test solutions from silicon bring-up to high-volume production.